to use type
Optimize library and package imports in a way that decreases simulation time by 20-40% for small testbenches using GHDL.
4.0.0 (25 january 2024)
Implement our own lightweight axi_stream_protocol_checker.vhd that greatly reduces CPU cycles consumed during simulation.
userport to width_conversion.vhd.
Fix bug in axi_lite_reg_file.vhd where a non-zero default value for a register of type
r_wpulsewould only be asserted on
regs_downthe very first clock cycle.
Fix bug where axi_read_throttle.vhd could lower
ARVALIDwithout an AR transaction having occurred.
Rename axi_lite_mux.vhd generic
base_addressesand change type to
addr_vec_t, i.e. a list of base addresses. Same for axi_lite_to_vec.vhd generic
axi_lite_slaves. The address mask is now calculated internally.
Rename optional axi_write_master.vhd generic
3.0.2 (27 september 2023)
3.0.1 (27 september 2023)
3.0.0 (2 march 2023)
Fix bug where fifo.vhd in packet mode could propagate erroneous data when a packet of length one was written to an almost empty FIFO.
Rename axi_stream_slave.vhd port
Rename width_conversion.vhd generic
Change to use unresolved VHDL types consistently.
Remove erroneous assignment of
read_levelwhen packet mode is enabled.
Remove the rarely used
read_levelwhich does not have valid value in all configurations.
Remove the rarely used
output_data_fifo_levelwhich does not have valid value in all configurations.
2.0.0 (24 august 2022)
Add handshake_pipeline.vhd generic
pipeline_data_signalswith default value
true, and implement mode that pipelines control signals but not data.
Fix full throughput in keep_remover.vhd when not all input lanes are strobed.
Fix bug in axi_write_throttle.vhd where rogue
AWtransactions could occur.
Fix handling of handshake signals in handshake_splitter.vhd to be AXI-Stream compliant.
Rework handshake_splitter.vhd to use
output_valid. Introduce mandatory generic
Drive output signals with
'X'per default when
validis low in axi_stream_master.vhd.
Remove default value for
id_widthgeneric, which could potentially hide errors, in axi_slave.vhd, axi_read_slave.vhd and axi_write_slave.vhd. Now the user has to set an explicit value for every instance.
Rework axi_write_throttle.vhd concept completely, as part of a bug fix. It is simpler and more light weight now. The
data_fifo_levelport as well as all generics have been removed.
1.0.0 (20 october 2021)
get_hdl_modules() call in all